Sami YEHIA

Sami YEHIA Senior Research Engineer at ARM Ltd, Cambridge, UK. Previously member of the ALCHEMY project in INRIA-Futurs
Email	sami (at) yehia [dot] eu

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Computer Architecture, design and analysis of microprocessors, embedded systems, memory hierarchy, decoupled architectures, and system architecture.

More particularly, instruction set customization, idiomization, irregular data access patterns (linked data structures).

Ph.D. in Computer Science, Computer Architecture, Paris-Sud (Paris XI) University, Orsay, France.

Ph.D. Thesis Title: “Alternative Approaches to Improve Performance without ILP”
Defense Jury: André SEZNEC (IRISA/INRIA), Sanjay PATEL (University of Illinois at UrbanaChampaign), Marc DURANTON (Philips Research) and Olivier TEMAM ( Paris-Sud XI University).
September 2004, Advisor: Professor Olivier Temam.
Dissertation ps ps.gz pdf pdf.gz

Master’s Degree in Parallel Architectures, Paris-Sud University, Orsay, France.

Dissertation Title: “Méthodologie d’évaluation des architectures des processeurs,” Advisor: Professor Olivier Temam.
September 2000, Advisor: Professor Olivier Temam.

Master’s Degree In Computer Engineering, Arab Academy for Science and Technology, Alexandria, Egypt.

Master Thesis title: “Architectural Level Synthesis in A Reconfigurable Environment,” Advisor: Dr. Yasser Y. Hanafy and Professor Youssry Y. El Gamal.
August 1999, Advisors: Dr. Yasser Y. Hanafy and Professor Youssry Y. El Gamal.

BSc in Computer Science and Automatic Control. Faculty of Engineering, Alexandria University.

Nathan Clark, Amir Hormati, Scott Mahlke, and Sami Yehia, "Scalable Subgraph Mapping for Acyclic Computation Accelerators," International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), October 2006. (pdf)

Sami Yehia, Nathan Clark, Scott Mahlke, and Krisztian Flautner, "Exploring the Design Space of LUT-based Transparent Accelerators," International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), September 2005. (Best Paper Award). (pdf)

Jean-Francois Collard, Norm Jouppi and Sami Yehia, “System-Wide Performance Monitors and their Application to the Optimization of Coherent Memory Accesses,” ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPOPP’05), June 2005. (pdf)

Sami Yehia and Olivier Temam, “From Sequences of Dependent Instructions to Functions: An Approach for Improving Performance without ILP or Speculation,” 31th Annual International Symposium on Computer Architecture (ISCA), June 2004. (pdf)

Sami Yehia, Jean-François Collard and Olivier Temam, “Load Squared: Adding Logic Close to Memory to Reduce the Latency of Indirect Loads with High Miss Ratios,” MEDEA Workshop, held in conjunction with the International Conference of Parallel Architectures and Compilation Techniques (PACT), October 2004. (pdf)

Sami Yehia and Olivier Temam, “From Sequences of Dependent Instructions to Functions: A Complexity Effective Approach for Improving Performance without ILP or Speculation,” 4^th Workshop on Complexity-effective Design (WCED) held in conjunction with the 30th Annual International Symposium on Computer Architecture (ISCA), June 2003. (pdf)

Sami Yehia and Yasser Y. Hanafy, ”Optimal Module Selection and Scheduling of Dynamically Reconfigurable Processors,” 9th International Conference on Computer Theory and applications (ICCTA ‘ 99), 1999, AlexandriaEgypt.

Sami Yehia, Jean-François Collard and Olivier Temam, “Load Squared: Adding Logic Close to Memory to Reduce the Latency of Indirect Loads in Embedded and General Systems,” Journal of Embedded Computing (JEC) , Volume 2, Number 1, January 2006, IOS Press.

Sami YEHIA

Last Updated : 12 September 2006