Sami YEHIA

French citizenship,

Married,

143 rue de Silly, 92100 Boulogne Billancourt, France

E-mail:sami [at] yehia [org] eu

 

RESEARCH INTERESTS

           

Computer Architecture, design and analysis of microprocessors, embedded systems, simulation, memory hierarchy, decoupled architectures, and system architecture. Currently at ARM ltd, UK.

 

EDUCATION

 

Ph.D. in Computer Science, Computer Architecture, Paris-Sud (Paris XI) University, Orsay, France. (September 2000 to September 2004)

·         Ph.D. Thesis Title: “Alternative Approaches to Improve Performance without ILP”

·         Defense Jury: André SEZNEC (IRISA/INRIA), Sanjay PATEL (University of Illinois at Urbana Champaign),  Marc DURANTON (Philips Research) and Olivier TEMAM ( Paris-Sud XI University)

·         September 2004, Advisor: Professor Olivier Temam.

Master’s Degree in Parallel Architectures, Paris-Sud University, Orsay, France. (September 1999 to July 2000)

·         “Méthodologie d’évaluation des architectures des processeurs,” Advisor: Professor Olivier Temam.

·         Ranked 1st on writing exams.

Master’s Degree In Computer Engineering, Arab Academy for Science and Technology, Alexandria, Egypt. (September 1995 to 1999)

·          Master Thesis title: “Architectural Level Synthesis in A Reconfigurable Environment,”  Advisor: Dr. Yasser Y. Hanafy  and Professor Youssry Y. El Gamal.

·          GPA: 4.0/4.0.

BSc in Computer Science and Automatic Control. Faculty of Engineering, Alexandria University.  (September 1990 to June 1995)

·          Excellent with degree of honor ranked 5th (32 student)

General Certificate of Egypt. (July 1990)

·          Grade: 92.75/100, Ranked among the top 100 (about 250000 candidates).

 

PUBLICATIONS

 

Conferences and Workshops

·          Nathan Clark, Amir Hormati, Scott Mahlke, and Sami Yehia, "Scalable Subgraph Mapping for Acyclic Computation Accelerators," International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), October 2006.

·          Sami Yehia, Nathan Clark, Scott Mahlke, and Krisztian Flautner, "Exploring the Design Space of LUT-based Transparent Accelerators," International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), September 2005.

·          Jean-Francois Collard, Norm Jouppi and Sami Yehia, “System-Wide Performance Monitors and their Application to the Optimization of Coherent Memory Accesses,” ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPOPP’05), June 2005.

·          Sami Yehia, Jean-François Collard and Olivier Temam, “Load Squared: Adding Logic Close to Memory to Reduce the Latency of Indirect Loads with High Miss Ratios,” MEDEA Workshop, held in conjunction with the International Conference of Parallel Architectures and Compilation Techniques (PACT),  October 2005.

·          Sami Yehia and Olivier Temam, “From Sequences of Dependent Instructions to Functions: An Approach for Improving Performance without ILP or Speculation,” 31th Annual International Symposium on Computer Architecture (ISCA), June 2004.

·          Sami Yehia and Olivier Temam, “From Sequences of Dependent Instructions to Functions: A Complexity Effective Approach for Improving Performance without ILP or Speculation,” 4th Workshop on Complexity-effective Design (WCED) held in conjunction with the 30th Annual International Symposium on Computer Architecture (ISCA), June 2003.

·          Sami Yehia and Yasser Y. Hanafy, ”Optimal Module Selection and Scheduling of Dynamically Reconfigurable Processors,” 9th International Conference on Computer Theory and applications (ICCTA ‘ 99), 1999, Alexandria Egypt.

 

Journal papers

·          Sami Yehia, Jean-François Collard and Olivier Temam, “Load Squared: Adding Logic Close to Memory to Reduce the Latency of Indirect Loads in Embedded and General Systems,” Journal of Embedded Computing (JEC), Volume 2, Number 1, January 2006, IOS Press.

 

OTHER RESEARCH  ACTIVITIES

 

·          Technical Program Committee Member of

o        CASES 2006 (International Conference on Compilers, Architecture, and Synthesis for Embedded Systems).

o        ARCS 2006 (Architectures of Systems and Compilers).

·          Reviewer for International Conferences and workshops: ISPASS 2004, ASPLOS 2004, LCTES 2005, PACT 2005, CODES+ISSS 2005, CASES 2005, HIPEAC 2005, MOBS 2006, WASP 2006, DATE 2006, ISCA 2006, MICRO 2006.

·          Reviewer for International Journals: JSA (Journal of Systems and Architectures), IEEE TCAD Transactions,  ACM Transactions on Architecture and Code Optimization (TACO).

 

WORK EXPERIENCE

 

Currently: Senior Research Engineer at ARM ltd, Cambridge, UK.

Summer Internship at HP Palo Alto, CA – System Architecture Department

       (From July 2004 to October 2004).

Teaching Assistant (ATER) – Computer Science, Paris-Sud University, Orsay, France. (from October 2003 to July 2004).

·         Courses: Computer Architecture, Unix, Java Programming (Project).

Teaching Assistant (Moniteur) – Computer Science, Paris-Sud University, Orsay, France (from October 2000 to August 2003).

·         Courses: Principles of languages interpretation, Functional programming, Digital logic, Computer Architecture.

Teaching Assistant – Arab Academy for science and technology, College of engineering, Department of computer engineering (from October 1995 to June 1999).

·         Courses: Programming (Basic, Pascal, C), Object Oriented design, Numerical analysis, Computer Architecture, Databases, Data structures, Operating systems, Discrete mathematics, Digital design and software engineering.

Part time Instructor – American University of Cairo, Branch of Alexandria (from 1996 to 1999)

·         Courses: Ms-Word, MS-Access, MS-DOS, Introduction to Computers, Windows95, PASCAL, C Programming Language, Operating Systems, Numerical Analysis.

Design and development of an Accounting database under Visual Basic 6.0, MS-SQL server 7.0, for Salamarine Egypt, 1999.

Course at MICROSOFT Egypt: Microsoft SQL SERVER –System Administration (6 days), 1999.

Design and development of a shipping and container database under MS-Access, for Marina Shipping Agency, 1998.

Installation and starting of a Cyber- Café, Access Cyber Café in Alexandria, 1996.

BSc Project: Digital control of a heat rig, under Borland C++ , 1995.

Summer Internship Training at WEPCO (Western Desert Operating Petroleum Co.), 1993. 

Summer Internship at ANACAD Computer Systems, Grenoble, France, 1992.

COMPUTER AND LANGUAGE SKILLS

 

·         Languages:     C, C++, PROLOG, SQL, HTML, VBA,  Pascal, Basic, Java, CAML, Perl, Php scripting languages, Verilog Hardware Language..

·         Operating Systems: Windows, Linux.

·         Software and tools:    Xilinx Foundation Series, Visual Studio, Word, Excel , Access, Power Point, MS SQL Server, FrontPage, PVM, ARM RealView Soc Designer (Max,Sim™),  ARM RealView Core Generator (MaxCore™).

 

LANGUAGES

 

·         French: Native language

·         English: Fluent

·         Arabic: Fluent

 

OTHERS

 

GRE:   Graduate Record Examination, ETS.

·         Verbal: 410 (29% below).

·         Quantitative: 760 (92% below).

·         Analytical: 710 (88% below)

·         Subject (Computer Science) : 760 (82% below)

 

TOEFEL: Test of English As A Foreign Language, ETS

·         Score : 637

 

Alliance française : Diplôme de langue française

 

FCE:   First Certificate in English – University of Cambridge